AMMA: A Multi-Chiplet Memory-Centric Architecture for Low-Latency 1M Context Attention Serving

arXiv cs.AI / 4/30/2026

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Key Points

  • The paper argues that existing LLM serving architectures put GPUs at the center, which is inefficient for decode-phase attention because it is memory-bound rather than compute-bound.
  • It introduces AMMA, a memory-centric, multi-chiplet design that replaces GPU compute dies with HBM-PNM “cubes,” roughly doubling memory bandwidth for long-context (up to ~1M tokens) attention serving.
  • AMMA includes a custom logic-die microarchitecture to leverage each cube’s internal bandwidth efficiently, plus two-level hybrid parallelism and a reordered collective communication flow to cut die-to-die overhead.
  • Design-space exploration (varying per-cube compute power and intra-chip D2D link bandwidth) provides practical tuning guidance for hardware architects.
  • In evaluation results, AMMA reduces attention latency by 15.5× and energy consumption by 6.9× versus NVIDIA H100.

Abstract

All current LLM serving systems place the GPU at the center, from production-level attention-FFN disaggregation to NVIDIA's Rubin GPU-LPU heterogeneous platform. Even academic PIM/PNM proposals still treat the GPU as the central hub for cross-device communication. Yet the GPU's compute-rich architecture is fundamentally mismatched with the memory-bound nature of decode-phase attention, inflating serving latency while wasting power and die area on idle compute units. The problem is compounded as reasoning and agentic workloads push context lengths toward one million tokens, making attention latency the primary user-facing bottleneck. To address these inefficiencies, we present AMMA, a multi-chiplet, memory-centric architecture for low-latency long-context attention. AMMA replaces GPU compute dies with HBM-PNM cubes, roughly doubling the available memory bandwidth to better serve memory-bound attention workloads. To translate this bandwidth into proportional performance gains, we introduce (i) a logic-die microarchitecture that fully exploits per-cube internal bandwidth for decode attention under a minimal power and area budget, (ii) a two-level hybrid parallelism scheme, and (iii) a reordered collective flow that reduces intra-chip die-to-die communication overhead. We further conduct a design-space exploration over per-cube compute power and intra-chip D2D link bandwidth, providing actionable guidance for hardware designers. Evaluations show that AMMA achieves 15.5X lower attention latency and 6.9X lower energy consumption compared with the NVIDIA H100.