Ternary Memristive Logic: Hardware for Reasoning Realized via Domain Algebra

arXiv cs.AI / 4/25/2026

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Key Points

The paper proposes “ternary memristive logic,” where each memristive junction directly stores a domain-scoped logical assertion (true/negated/undefined), rather than just a numerical weight needing decoding.
It introduces a structure-preserving mapping from a domain algebra to crossbar hardware topology, so that concepts like specialization, relation typing, and explicit cross-domain links are realized through wiring and layout.
A key demonstration is an ICD-11 respiratory disease classification chip with 1,247 entities and roughly 136k 1T1R junctions, implemented to support domain scoping, three-valued logic, transitive cascades, typed inheritance, and cross-axis queries.
Hardware-level behavioral simulation reports error-free operation across 100,000 trials per task with wide tolerance margins (sigma_log=0.15, SNR=20 dB), suggesting robust reasoning behavior under noise.
Unlike prior approaches that separate representation (software) from computation (hardware), this work unifies them so that reading a single junction corresponds to answering a specific question without additional symbolic interpretation.

Abstract

Memristive crossbars store numerical weights needing aggregation and decoding; a single junction means nothing alone. This paper presents a fundamentally different use: each junction stores a complete, domain-scoped logical assertion (holds/negated/undefined). Ternary resistance states encode these values directly. We establish a structure-preserving mapping from a domain algebra to crossbar topology: domains become isolated arrays, specialization becomes directed wiring, relation typing controls inheritance gates, and cross-domain links become explicit registers. The physical layout thus embodies the algebra; changing wiring changes reasoning semantics. We detail an ICD-11 respiratory disease classification chip (1,247 entities, ~136k 1T1R junctions) enabling domain scoping, three-valued logic, transitive cascade, typed inheritance, and cross-axis queries. Behavioral simulation (sigma_log=0.15, SNR=20dB) shows error-free operation across 100,000 trials per task with wide tolerance margins. Where prior work unified representation and computation in software, this work unifies them in hardware: reading one junction answers one question, without symbolic interpretation.